Integrated Dual Processor Core CPU

Integrated Dual Processor Core CPU

1. Integrated 72-bit DDR4 Controller (including 8-bit ECC);
2. Integrated two SATA3.0 interfaces;
3. Adopt FC-BGA encapsulation.

Integrated Dual Processor Core CPU

Integrated Dual Processor Core CPU

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    Integrated Dual Processor Core CPU

    Ericco's processor (short for ER-CPU-22K) is mainly for network applications, both tablet applications and industrial control applications. Two processor cores are integrated on the chip, the Arch instruction system is adopted, the main frequency is about 1.6GHz, and the 72-bit DDR4 controller is integrated with various system I/O interfaces.

     Main features

    ▲Integrated two 64-bit triple emission superscalar EA364 processor cores with a main frequency of 1.6GHz in the chip

    ▲Integrated shared 2MB level 2 Cache in the chip

    ▲An EA132 processor core

    ▲Integrated 3D GPU in the chip

    ▲Support dual-channel display (HDMI and DVO)

    ▲1 VPU decoder

    ▲Integrated 72-bit DDR4 Controller (including 8-bit ECC) in the chip

    ▲One x4 PCIE 3.0 port can be divided into four independent PCIE x1 ports in RC mode

    ▲One x4 PCIE 3.0 port can be divided into two independent PCIE x1 ports or one x4 rapidIO 2.2 port, RC mode only

    ▲One x4 PCIE 3.0 port that can be used as one x4 RapidIO 2.2 port. RC or EP mode is available

    ▲One 4-channel DMA

    ▲Integrated two SATA3.0 interfaces in the chip

    ▲Integrated up to 4 USB 3.0 and 9 USB2.0 in the chip, one of which is OTG

    ▲Integrated one RGMII Gigabit PHY interface and two gigabit network ports in the chip, supporting TSN and MSI interrupt

    ▲Integrated HDA/I2S interface in the chip

    ▲Integrated RTC/HPET module in the chip

    ▲Integrated three full-function UART interfaces and one dual-wire UART interface in the chip

    ▲Integrated six CAN controllers in the chip

    ▲Integrated six PWM controllers in the chip

    ▲Integrated one SDIO controller in the chip

    ▲Integrated one eMMC controller is integrated in the chip

    ▲Integrated two SPI controllers in the chip, support QSPI

    ▲Integrated four I2C controllers in the chip

    ▲Integrated one LPC controller in the chip

    ▲Integrated one LIO controller in the chip

    ▲Integrated one AVS interface in the chip

    ▲ACPI specification

    ▲The maximum number of GPIO interfaces is 96

    ▲Secure trusted module

    ▲Integrated temperature sensor in the chip

    ▲Integrated dynamic power control module

    ▲Adopt FC-BGA encapsulation

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